Antique computer memory was too expensive in 1970! Former Microsoft engineer made his own: AI draws circuit FPGA as master

Kuai Technology reported on November 1 that former Microsoft engineer Dave Plummer was dissatisfied with the sky-high price of PDP-11 antique computer memory. With the help of ChatGPT and EasyEDA online circuit simulator, he designed a homemade RAM board from scratch. The PDP-11 was born in 1970. Later models supported up to 4MB of memory. The original memory was extremely expensive. Plummer designed an independent memory card based on the Q-Bus used by some models of the PDP-11 and completed the test on the backplane equipped with the M8190 CPU. The core of the circuit is a Lattice MachXO2 FPGA (model 2000HC) as the memory controller, connected to four ISSI 1MB memory chips, plus a U2S I/O chip, a set of DIP switches, communication ports and several capacitors to form a complete circuit. The M8190 board is designed to be 22bit wide, with the top 256KB reserved for I/O and ROM. Since Plummer had never flashed firmware for an FPGA before, the first few attempts failed before he succeeded. Then he fell into a classic PDP-11 trap. The machine's memory can only be accessed in two bytes. The lowest bit of the address is used as a channel selector to distinguish high and low bytes. When reading, the CPU will select the correct byte on its own. However, the memory controller still needs to return two bytes. When writing, the channel selection bit must be read and the correct byte selected, otherwise the whole word write will destroy the data. Plummer was not aware of this at first. Someone in the comment area joked that he "made 4MB of memory and only had 2MB." Subsequent comments pointed out the problem and speculated that he had fixed it in the FPGA code. Another netizen suggested using a Raspberry Pi to directly connect to the PDP bus to implement memory in software to avoid hardware problems. Plummer replied that he had done a similar solution with a modern QBone DEC interface board last week.